Hardware

Basil supports integration with several custom hardware platforms developed at SiLab for connecting to devices under test (DUTs). Each board provides FPGA-based digital IO with a host PC interface, and can be paired with analog front-end cards or custom DUT carrier boards.

• BDAQ53 – Gigabit Ethernet readout board with Enclustra Mercury KX1/KX2 FPGA modules and SiTCP

• MIO (MultiIO) – Digital IO card with Xilinx Spartan-3 FPGA and USB 2.0 interface

• MIO3 (MultiIO USB3) – Digital IO card based on Enclustra KX1 module with USB 3.0 interface

• GPAC (General Purpose Analog Card) – Analog front-end for MIO, with power supplies, current sources, ADCs, and injection pulse generator

• LX9 – Xilinx Spartan-6 LX9 MicroBoard adapter

BDAQ53

The BDAQ53 board is a readout board developed at SiLab for lab bench or testbeam characterization of silicon pixel detectors. The software part of the readout system is written in Python and meant to be easily understandable and modifiable.

Originally designed for the RD53 collaboration, serving the ATLAS ITkPix chip family, the BDAQ53 board has since been adopted by a number of other projects at SiLab, including the TJ-Monopix2 depleted monolithic pixel sensor, LF-Monopix2, the Belle II DEPFET upgrade, and the FRIDA ADC test chip.

The board accepts Enclustra Mercury FPGA modules, either the KX1 (speed grade -1) or KX2, which plug into the top of the board via high-density connectors. Both carry a Xilinx Kintex-7 FPGA. Communication with the host PC is over Gigabit Ethernet using SiTCP, a TCP/IP stack implemented directly in FPGA fabric.

Around the edges of the board, five DisplayPort connectors (DP1 to DP5) provide high-density differential IO for connecting to custom DUT carrier boards. Four RJ45 connectors offer additional single-ended or differential pairs. A standard PMOD header exposes eight general-purpose signal pins (plus power and ground) for debug probing with a logic analyzer or oscilloscope. The board is powered by an external 5 V supply and programmed via JTAG using a Xilinx Platform Cable.

More information can be found in the BDAQ53 wiki as well as the BDAQ53 paper (NIM A, 2020).

MIO (Multi IO Card)

The “S3 Multi IO System” is developed as an easy-to-use multi-purpose digital IO card. It includes a free programmable Xilinx Spartan3 FPGA, SRAM Memory, USB2.0 Interface and a 8051 microcontroller with I2C and SPI functionality. It is designed to provide sufficient digital IO capability to any kind of daughter card.

Features:

Silicon devices

• Xilinx Spartan3 FPGA - XC3S1000 FG320 4C

• Cypress USB Controller - CY7C68013A 128AXC

• Cypress async. SRAM - CY7C1061AV33 10ZXC

• Programmable clock generator - Cypress CY22150

IO connections

• USB2.0 B-type as host interface

• Multi-IO-Connector with 80 user IO´s (VccIO 1:2 V to 3:3 V)

• Agilent debug connector (1253-3620)

• JTAG connection

• RJ-45 connector for 2 LVDS transmitter and 2 LVDS receiver

• Header with I2C and SPI functionality

• Header with additional FPGA user IO´s

• 3 buffered LVTTL outputs with LEMO

• 3 buffered LVTTL inputs with LEMO

Power supply

• via external 5V supply

• via USB cable

Configuration capability

• via JTAG

• via USB2.0

Note

Documentation for the MIO card was previously hosted on SiLab Redmine (no longer publicly available).

GPAC (General Purpose Analog Card)

GPAC Card is developed as an easy-to-use multi-purpose analog IO card compatible with MIO Card.

Features:

• 4 regulated power supplies, 0.8-1.83/2.83 V, max. 1000 mA, (controlled by I2C)

• 4 RX and 4 TX LVDS Lines

• 4 channel ADC, 25MS, 14-bit

• 16 CMOS Outputs

• 8 CMOS Inouts

• 12 current source/sink, -1 mA to +1 mA, 12-bit (controlled by I2C)

• 4 voltage outputs, 0-2.048 V, 12-bit (controlled by I2C)

• 64x (4 available to DUT) channel slow ADC for monitoring (controlled by I2C)

• Injection Pulse Generator with programmable voltage levels (high and low)

Note

Documentation for the GPAC card was previously hosted on SiLab Redmine (no longer publicly available).

MIO3 (Multi IO Card USB3)

TBD.

LX9

The Avnet Xilinx Spartan-6 LX9 MicroBoard (discontinued).

4 channel FE-I4 adepter with TLU: